Format of PCI Configuration Data for Intel 82437MX |
| Offset | Size | Description |
|---|---|---|
|
00h |
64 BYTEs |
header (see #00878) (vendor ID 8086h, device ID 1235h) |
|
40h |
16 BYTEs |
reserved |
|
50h |
BYTE |
PCI Control (see #01111) |
|
51h |
BYTE |
reserved |
|
52h |
BYTE |
cache control (see #01112) |
|
53h |
4 BYTEs |
reserved |
|
57h |
BYTE |
DRAM Control (see #01116) |
|
58h |
BYTE |
DRAM timing (see #01117) |
|
59h |
7 BYTEs |
Programmable Attribute Map registers 0-6 (see #01118) |
|
60h |
4 BYTEs |
DRAM Row Boundary Registers 0-3 each register N indicates cumulative amount of memory in rows 0-N, in 4M units (each row is 64 bits wide) |
|
64h |
4 BYTEs |
reserved |
|
68h |
BYTE |
DRAM Row Type (see #01121) |
|
69h |
9 BYTEs |
reserved |
|
72h |
BYTE |
System Management RAM control (see #01123) |
|
73h |
141 BYTEs |
reserved |
|
See Also: |