Bitfields for Intel 82425EX PCI control register |
| Bit | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
0 |
CPU-to-PCI byte merging | ||||||||||||
|
1 |
CPU-to-PCI bursting enable | ||||||||||||
|
2 |
PCI posted-write buffer enable | ||||||||||||
|
4 - 3 |
subtractive decode sampling point
|
||||||||||||
|
5 |
DRAM parity error enable | ||||||||||||
|
6 |
target abort error enable | ||||||||||||
|
7 |
reserved |
|
See Also: |