Bitfields for AMD-640 System Performance Control Register |
| Bit | Description |
|---|---|
|
7 |
enable read-around-write |
|
6 |
enable cache read pipeline cycle |
|
5 |
enable cache write pipeline cycle |
|
4 |
enable DRAM pipeline cycle |
|
3 |
enable PCI Peer Concurrence (PCI initiator can transfer to another PCI device without blocking memory or CPU bus) |
|
2 - 0 |
reserved (0) |
|
See Also: |