self-refresh entry is staggered; if "SDRAMPWR"
(offset 76h bit 4) is set, 3 DIMMs are supported, CKE[5:0] is driven,
and dynamic SDRAM power-down is available; if "SDRAMPWR" is
clear, 4 DIMMs are supported but power-down is not available
self-refresh entry is not staggered; 3 DIMMs are
supported, only CKE0 is driven, and dynamic power-down is not available