Bitfields for Intel 82441FX Error Command register |
| Bit | Description |
|---|---|
|
7 - 5 |
reserved |
|
4 |
enable SERR# on receiving Target Abort |
|
3 |
enable SERR# on PCI Parity Error (PERR#) |
|
2 |
reserved |
|
1 |
enable SERR# on receiving multiple-bit ECC/Parity error |
|
0 |
enable SERR# on receiving single-bit ECC error |
|
See Also: |