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Bitfields for Intel 82441FX PMC Configuration Register\

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Bit Description

15

WSC Protocol Enable

14

Row Select/Extra Copy select (read-only)
0 = extra copy of two lowest memory address bits enabled
1 = pins on PMC configured as two additional row selects (6/7)

13 - 10

reserved

9 - 8

host frequency select
00 = reserved
01 = 60 MHz
10 = 66 MHz
11 = reserved

7

reserved

6

ECC/Parity TEST enable

5 - 4

DRAM Data Integrity Mode
00 = no parity/ECC
01 = parity generated and checked
10 = ECC generated and checked, correction disabled
11 = ECC generated and checked, correction enabled

3

reserved

2

In-Order Queue size
0 = one
1 = four

1 - 0

reserved

See Also:

#01229,#01231