Bitfields for Intel 82371SB legacy support register |
Bit | Description |
---|---|
15 |
A20GATE pass-through sequence ended write 1 to clear this bit |
14 |
reserved |
13 |
USB PIRQ enabled |
12 |
USR IRQ status (read-only) |
11 |
trap caused by write to PORT 0064h write 1 to clear this bit |
10 |
trap caused by read from PORT 0064h write 1 to clear this bit |
9 |
trap caused by write to PORT 0060h write 1 to clear this bit |
8 |
trap caused by read from PORT 0060h write 1 to clear this bit |
7 |
enable SMI at end of A20GATE Pass-Through |
6 |
A20GATE pass-through sequence in progress (read-only) |
5 |
enable A20GATE pass-through sequence (write PORT 64h,D1h; write 60h,xxh; read 64h; write 64h,FFh) |
4 |
enable trap/SMI on USB IRQ |
3 |
enable trap/SMI on PORT 0064h write |
2 |
enable trap/SMI on PORT 0064h read |
1 |
enable trap/SMI on PORT 0060h write |
0 |
enable trap/SMI on PORT 0060h read |
See Also: |