Bitfields for Intel 82371MX Global SMI Enable register |
| Bit | Description |
|---|---|
|
7 |
System Events Enabled |
|
6 |
Software SMI#'s (generated by bit 0 of this register) Enabled |
|
5 |
reserved |
|
4 |
Local Traps Enabled |
|
3 |
Local Standby Timers Enabled |
|
2 |
Global Standby Timer Enabled |
|
1 |
SRBTN# and BATLOW# Enabled |
|
Note: |
Enables SMI# generation for the above hardware events. |
|
See Also: |