Bitfields for Intel 82443BX DRAM Read/Write Thermal Throttling Control |
| Bit | Description | ||||||
|---|---|---|---|---|---|---|---|
|
63 |
lock all read and write throttle control register bits (exists in Write Throttling control register only) | ||||||
|
62 - 46 |
reserved | ||||||
|
45 - 38 |
global DRAM sampling window (in four-millisecond units) | ||||||
|
37 - 26 |
global QWORD threshold (documented as units of 215, but may be
typo and actually be units of 2^15 = 32768) thermal throttling will be invoked if the number of QWORD accesses during the sampling window exceeds the threshold count |
||||||
|
25 - 20 |
throttle time in multiples of the sampling window | ||||||
|
19 - 13 |
throttle monitoring window in 16 DRAM-clock units | ||||||
|
12 - 3 |
throttle QWORD maximum count -- while throttling is enabled, at most this many QWORD accesses are permitted during each throttle monitoring window | ||||||
|
2 - 0 |
DRAM Throttle Mode
|
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See Also: |