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Bitfields for Intel 82439TX/82443BX Extended SMRAM Control register

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Bit Description

7

SMRAM location
0 = compatible SMRAM space at segment A000h
1 = high SMRAM space at addreses 100A0000h to 100FFFFFh (accessing physical DRAM addresses A0000h to FFFFFh)

6

(write-clear) access to extended SMRAM memory range when SMRAM space is not open and not in SMM

5

enable write-through caching of SMRAM (forced to 1 by 82443BX, to 0 by 82439TX)

4

enable L1 caching of SMRAM (forced to 1 by 82443BX)

3

enable L2 caching of SMRAM (forced to 1 by 82443BX)

2 - 1

TSEG size (read-only once SMRAM locked) (see #01123)
00 = 128K
01 = 256K
10 = 512K
11 = 1M

0

enable TSEG (read-only once SMRAM locked) (see #01123)
when both SMRAM and TSEG are enabled, the top N kilobytes of physical DRAM are no longer claimed by the memory controller, and instead appear as extended SMRAM at an address 256M higher than the physical address

See Also:

#01142,#01123,#01099