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Bitfields for Intel 8243x/8244x Programmable Attribute Map Register

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Bit Description

7

 reserved

6

 cache enable (region 1)

5

 write enable (region 1)

4

 read enable (region 1)

3

 reserved

2

 cache enable (region 0)

1

 write enable (region 0)

0

 read enable (region 0)

Note:

 Each programmable attribute map register controls two memory regions at the top of the first megabyte of memory.
For the Intel 82441FX and 82443BX/LX, bits 6 and 2 are reserved, as cacheability is set using the Pentium Pro/II/Celeron's MTRR registers.
Intel 82434,82437FX/MX/VX,82439HX,82441FX,82443EX/LX PAM registers/regions:
PAM0 low : reserved
on the 82434 (and possibly other Intel chipsets), the low nybble of PAM0 controls segment 8000-9FFF
high : segment F000-FFFF
PAM1 low : segment C000-C3FF
high : segment C400-C7FF
PAM2 low : segment C800-CBFF
high : segment CC00-CFFF
PAM3 low : segment D000-D3FF
high : segment D400-D7FF
PAM4 low : segment D800-DBFF
high : segment DC00-DFFF
PAM5 low : segment E000-E3FF
high : segment E400-E7FF
PAM6 low : segment E800-EBFF
high : segment EC00-EFFF

See Also:

 #01055,#01108,#01098,#01099,#01229,#01106,#01107,#01142,#01129