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Bitfields for Intel 82437VX,82439HX/TX PCI Control register

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Bit Description

7 - 4

 reserved (82437VX,82439TX)

7

 DRAM ECC/Parity Select (82439HX)
0 = ECC
1 = parity

6

 ECC TEST enable (82439HX)

5

 shutdown to port 92h (82439HX)
1 = send 01h to PORT 0092h on Shutdown special cycle on host bus

4

 dual-processor NA# enable (82439HX)

3

 PCI Concurrency Enable
0 = CPU kept off PCI bus during all PCI bus-master cycles
1 = CPU can access DRAM/L2 during non-PIIX PCI master cycles

2 - 0

 reserved (82437VX,82439TX)

2

 SERR# Output Type (82439HX only)
0 = SERR# is PCI-compatible open-drain output
1 = SERR# is actively driven high when negated

1

 reserved

0

 Global TXC Enable (82439HX only)
1 = enable new 82439HX features

See Also:

#01099,#01108,#01098,#01112,#01111