Bitfields for AMD-645 USB Miscellaneous Control 2 register |
| Bit | Description |
|---|---|
|
7 - 3 |
reserved (0) |
|
2 |
only trap port 60h/64h bits when trap-enable bits are set |
|
1 |
do not pass A20GATE command sequence (from UHCI) through I/O port 64h |
|
0 |
reserved (0) |
|
See Also: |