Bitfields for AMD-645 IDE FIFO Configuration register |
| Bit | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
7 |
reserved (0) | ||||||||||||
|
6 - 5 |
FIFO configuration
|
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|
4 |
reserved (1) | ||||||||||||
|
3 - 2 |
primary channel FIFO threshold:
|
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|
1 - 0 |
secondary channel FIFO threshold:
|
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See Also: |