Bitfields for AMD-645 PCI IRQ Edge/Level Select register |
| Bit | Description |
|---|---|
|
7 - 4 |
reserved |
|
3 |
PIRQA# is edge-sensitive rather than level-sensitive |
|
2 |
PIRQB# is edge-sensitive |
|
1 |
PIRQC# is edge-sensitive |
|
0 |
PIRQD# is edge-sensitive |
|
See Also: |