[ Up ] [ Docs Home ]

Bitfields for AMD-645 Type-F DMA Control register

[ Back ] [ Next ]
Bit Description

7

enable line buffer from ISA Master/DMA to PCI

6 - 4

enable Type F timing on DMA Channels 7, 6, 5

3 - 0

enable Type F timing on DMA Channels 3-0

See Also:

#01011