Bitfields for PicoPower Vesuvius V3-LS PCI-to-ISA bridge configuration |
Bit | Description |
---|---|
31 - 15 |
reserved |
14 |
AD/SD/SA bus staggering enable |
13 |
ISA bridge PCI positive decode enable |
12 |
ISA bridge PCI subtractive decode disable |
11 - 10 |
reserved |
9 |
retry enable |
8 |
lock input enable |
7 |
SERR#/NMI status flag (write 1 to clear) |
6 |
PERR#/NMI status flag (write 1 to clear) |
5 |
SERR# triggers NMI enable |
4 |
PERR# triggers NMI enable |
3 |
reserved |
2 - 0 |
(revision BB and later) system configuration setting |
See Also: |