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Format of PCI Configuration data for OPTi 82C861/82C871 PCI-to-USB Bus Bridge

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Offset Size Description

00h

64 BYTEs

header (see #00878) (vendor ID 1045h, device ID C861h)

40h

4 BYTEs

reserved for testing

44h

10 BYTEs

reserved

4Eh

BYTE

I2C control
bits 7 - 5 : reserved
bits 4 : I2C data output read-back (read-only)
bits 3 : I2C clock output read-back (read-only)
bits 2 : I2C data output
bits 1 : I2C clock output
bits 0 : I2C control enable

4Fh

BYTE

reserved

50h

BYTE

PCI host feature control
bits 7 - 4 : reserved
bits 3 : subsystem vendor ID register write disable
bits 2 : CLKRUN# enable
bits 1 : port 2 output disable
bits 0 : port 1 output disable

51h

BYTE

interrupt assignment
bit 7 : host controller type
0 = Viper-N+ (send 1 data phase on IRQ driveback)
1 = FireStar (send 2 data phases on IRQ driveback)
bit 6 : IRQ driveback enable
bit 5 : reserved
bits 4 - 0 : interrupt assignment
00000 = disabled
00001 = PCIRQ0# (default)
00010 = PCIRQ1#
00011 = PCIRQ2#
00100 = PCIRQ3#
00101 = ACPI0
00110 = ACPI1
00111 = ACPI2
01000 = ACPI3
01001 = ACPI4
01010 = ACPI5
01011 = ACPI6
01100 = ACPI7
01101 = ACPI8
01110 = ACPI9
01111 = ACPI10
10000 = IRQ0
10001 = IRQ1
10010 = IRQ2
10011 = IRQ3
10100 = IRQ4
10101 = IRQ5
10110 = IRQ6
10111 = IRQ7
11000 = IRQ8
11001 = IRQ9
11010 = IRQ10
11011 = IRQ11
11100 = IRQ12
11101 = IRQ13
11110 = IRQ14
11111 = IRQ15

52h

2 BYTEs

reserved

54h

DWORD

IRQ driveback address
bits 1-0: reserved to 00 (read-only)

58h

20 BYTEs

reserved

6Ch

DWORD

reserved (test mode enable)

See Also:

#00878,#00929,#00939