Bitfields for CardBus Socket Event Register |
| Bit | Description |
|---|---|
|
0 |
CSTSCHG pin asserted (status change) |
|
1 |
CCD1# (card detect 1) changed state |
|
2 |
CCD2# (card detect 2) changed state |
|
3 |
interface power cycle completed |
|
31 - 4 |
reserved (0) |
|
Note: |
The bits in this register are set by the bridge, and cleared by writing a one into the bits one wishes to clear. |
|
See Also: |