Bitfields for PCI Power Management Capabilities Status Register |
| Bit | Description | ||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
|
15 |
PME status: if set, PME# is (or would be) asserted writing a 1 to this bit clears it |
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14-13 |
(read-only) scale factor to apply to contents of Data register
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|
12-9 |
(read-write) data select (see #00888) | ||||||||||||
|
8 |
(read-write) enable PME# assertion | ||||||||||||
|
7-5 |
reserved (0) | ||||||||||||
|
4 |
reserved (0) 4 (read-write) enable dynamic data
reporting when set, PME# is asserted whenever the value in the Data register changes significantly |
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|
3-2 |
reserved (0) | ||||||||||||
|
1-0 |
(read-write) current power state
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Note: |
This information is from the v0.93 draft of the specification and is subject to change. |
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See Also: |