Bitfields for PCI Configuration Built-In Self-Test register |
| Bit | Description |
|---|---|
|
3 - 0 |
completion code (0000 = successful) |
|
5 - 4 |
reserved |
|
6 |
start BIST (set to one to start, cleared automatically on completion) |
|
7 |
BIST-capable |
|
Note: |
This register is hardwired to 00h if no BIST capability software should timeout the BIST after two seconds. |
|
See Also: |