| Code |
Mnemonic |
Description |
| FF /6 |
PUSH r/m16 |
Push r/m16 |
| FF /6 |
PUSH r/m32 |
Push r/m32 |
| 50 + rw |
PUSH r16 |
Push r16 |
| 50 + rd |
PUSH r32 |
Push r32 |
| 6A |
PUSH imm8 |
Push imm8 |
| 68 |
PUSH imm16 |
Push imm16 |
| 68 |
PUSH imm32 |
Push imm32 |
| 0E |
PUSH CS |
Push CS |
| 16 |
PUSH SS |
Push SS |
| 1E |
PUSH DS |
Push DS |
| 06 |
PUSH ES |
Push ES |
| 0F A0 |
PUSH FS |
Push FS |
| 0F A8 |
PUSH GS |
Push GS |
Description
Decrements the stack pointer and then stores the source operand on the top of the stack. The address-size attribute of the stack segment determines the stack pointer size (16 bits or 32 bits), and the operand-size attribute of the current code segment determines the amount the stack pointer is decremented (2 bytes or 4 bytes). For example, if these address- and operand-size attributes are 32, the 32-bit ESP register (stack pointer) is decremented by 4 and, if they are 16, the 16-bit SP register is decremented by 2.(The B flag in the stack segment's segment descriptor determines the stack's address-size attribute, and the D flag in the current code segment's segment descriptor, along with prefixes, determines the operand-size attribute and also the address-size attribute of the source operand.) Pushing a 16-bit operand when the stack address-size attribute is 32 can result in a misaligned the stack pointer (that is, the stack pointer is not aligned on a doubleword boundary).
The PUSH ESP instruction pushes the value of the ESP register as it existed before the instruction was executed. Thus, if a PUSH instruction uses a memory operand in which the ESP register is used as a base register for computing the operand address, the effective address of the operand is computed before the ESP register is decremented.
In the real-address mode, if the ESP or SP register is 1 when the PUSH instruction is executed, the processor shuts down due to a lack of stack space. No exception is generated to indicate this condition.
| Operands |
Bytes |
Clocks |
| reg |
1 |
1 |
UV |
| mem |
2 + d(0 - 2) 2 |
2 |
NP |
| seg |
1 |
1 |
NP |
| imm |
1 + i(1, 2) 1 |
1 |
NP |
| FS/GS |
2 |
1 |
NP |
Flags
| ID |
unaffected |
DF |
unaffected |
| VIP |
unaffected |
IF |
unaffected |
| VIF |
unaffected |
TF |
unaffected |
| AC |
unaffected |
SF |
unaffected |
| VM |
unaffected |
ZF |
unaffected |
| RF |
unaffected |
AF |
unaffected |
| NT |
unaffected |
PF |
unaffected |
| IOPL |
unaffected |
CF |
unaffected |
| OF |
unaffected |