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HLT - Halt

Code	Mnemonic	Description
F4	HLT	Halt

Description
Stops instruction execution and places the processor in a HALT state. An enabled interrupt, NMI, or a reset will resume execution. If an interrupt (including NMI) is used to resume execution after a HLT instruction, the saved instruction pointer (CS:EIP) points to the instruction following the HLT instruction.

The HLT instruction is a privileged instruction. When the processor is running in protected or virtual-8086 mode, the privilege level of a program or procedure must be 0 to execute the HLT instruction.

Operands	Bytes	Clocks
	1	4	NP

Flags

ID	unaffected	DF	unaffected
VIP	unaffected	IF	unaffected
VIF	unaffected	TF	unaffected
AC	unaffected	SF	unaffected
VM	unaffected	ZF	unaffected
RF	unaffected	AF	unaffected
NT	unaffected	PF	unaffected
IOPL	unaffected	CF	unaffected
OF	unaffected

HLT - Halt

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