Make your own free website on Tripod.com
Up ] Docs Home ]

Bitfields for Intel 82441FX DBX buffer control register

Back ] Next ]

Bit Description

7

enable delayed transactions

6

enable CPU-to-PCI IDE posting

5

enable USWC Write Post during I/O Bridge access

4

disable PCI Delayed Transaction timer

3

enable CPU-to-PCI Write Post

2

enable PCI-to-DRAM pipeline

1

enable PCI Burst Write Combining

0

enable Read-Around-Write

See Also:

#01229,#01230