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Bitfields for Intel 82371FB/82371SB/82371MX IDE timing modes

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Bit Description

15

IDE decode enable

14

(82371SB) slave IDE timing register enable (see #01224)
(82371MX) primary/secondary address decode
0 = primary
1 = secondary

13 - 12

IORDY# sample point
00 = five clocks after DIOx# assertion
01 = four clocks
10 = three clocks
11 = two clocks

11 - 10

reserved

9 - 8

recovery time between IORDY# sample point and DIOx#
00 = four clocks
01 = three clocks
10 = two clocks
11 = one clock

7

(FB/SB) DMA timing enable only, drive 1
(MX) reserved

6

prefetch and posting enable, drive 1

5

IORDY# sample point enable drive select 1

4

fast timing bank drive select 1

3

(FB/SB) DMA timing enable only, drive 0
(MX) reserved

2

prefetch and posting enable, drive 0

1

IORDY# sample point enable drive select 0

0

fast timing bank drive select 0

See Also:

#01214,#01168