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Format of PCI Configuration for Intel 82443BX Device 0 (Host-PCI)

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Offset Size Description

00h

64 BYTEs

header (see #00878) (vendor ID 8086h, device ID 7190h/7192h)

10h

DWORD

graphics aperture base address

2Ch

WORD

subsystem vendor identification (write-once)

2Eh

WORD

subsystem device identification (write-once)

40h

16 BYTEs

reserved (0)

50h

DWORD

440BX Configuration (see #01144)

54h

3 BYTEs

reserved (0)

57h

BYTE

DRAM Control (see #01145)

58h

BYTE

DRAM Timing (see #01146)

59h

7 BYTEs

Programmable Attribute Map register 0-6 (see #01118)

60h

8 BYTEs

DRAM Row Boundary registers 0-7
each register indicates top of memory for a particular row, in 8MB units; DIMMs use two rows each, with single-sided DIMMs leaving the odd-numbered rows unpopulated

68h

BYTE

Fixed DRAM Hole Control (see #01147)

69h

6 BYTEs

Memory Buffer Strength Control (see #01148)

6Fh

2 BYTEs

reserved (0)

71h

BYTE

Intel Reserved (1Fh)

72h

BYTE

SMRAM Control (see #01123)

73h

BYTE

Extended SMRAM Control (see #01149)

74h

WORD

SDRAM Row Page Size (see #01150)

76h

WORD

SDRAM Control Register (see #01151)

78h

WORD

Paging Policy Register (see #01152)

7Ah

BYTE

Power Management Control (see #01153)

7Bh

WORD

Suspend CBR Refresh Rate Register (see #01154)

7Dh

3 BYTEs

reserved (0)

80h

DWORD

Error Address Pointer (see #01155)

84h

12 BYTEs

reserved (0)

90h

BYTE

Error Command Register (see #01156)

91h

WORD

Error Status Register (see #01157)

93h

BYTE

reserved (0)

94h

DWORD

Intel Reserved (00006104h)

98h

WORD

Intel Reserved (0500h)

9Ah

BYTE

Intel Reserved (0)

9Bh

5 BYTEs

reserved (0)

A0h

DWORD

AGP Capability Identifier (see #01158)

A4h

DWORD

AGP Status Register (read-only) (see #01159)

A8h

DWORD

AGP Command Register (see #01160)

ACh

4 BYTEs

reserved (0)

B0h

DWORD

AGP Control Register (see #01161)

B4h

BYTE

Aperture Size Control (see #01162)

B5h

3 BYTEs

reserved (0)

B8h

DWORD

Aperture Translation Table (see #01163)

BCh

2 BYTEs

reserved

BEh

WORD

reserved (0)

C0h

DWORD

Intel Reserved (0)

C4h

DWORD

Intel Reserved (0)

C8h

BYTE

Intel Reserved (18h)

C9h

BYTE

Intel Reserved (0Ch)

CAh

3 BYTEs

Memory Buffer Frequency Select (see #01164)

CDh

3 BYTEs

reserved (0)

D0h

8 BYTEs

BIOS scratch pad (read-write, init to 0 on reset)

D8h

8 BYTEs

Intel Reserved (0)

E0h

2 DWORDs

DRAM Write Thermal Throttling Control (see #01165)

E8h

8 BYTEs

DRAM Read Therman Throttling Control (see #01165)

F0h

WORD

Buffer Control Register (see #01166)

F2h

2 BYTEs

Intel Reserved (0000h)

F4h

DWORD

Intel Reserved (0000F800h)
bits 30-29 are "Abort Disable Test Mode" configuration bits and should always be set (according to Intel Specification Update)

F8h

DWORD

Intel Reserved (00000F20h)

FCh

DWORD

Intel Reserved (0)

See Also:

#00873,#01143