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Bitfields for Intel 82437FX/MX/VX,82439HX/TX DRAM timing register

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Bit Description

7

(82437FX,82439TX) reserved

7

(82437MX) MA[11:2] buffer strength
0 = 8mA
1 = 12mA

7

(82437VX) MA-to-RAS# Delay
0 = two clocks
1 = one clock

7

(82439HX) Turbo Read Leadoff
1 = bypass first register in DRAM data pipeline, saving one clock
(may only be set in a cacheless configuration)

6 - 5

DRAM Read Burst Timing
00 = x444 (EDO and Standard Page Mode)
01 = x333 (EDO), x444 (SPM)
10 = x222 (EDO), x333 (SPM)
11 = x322 (EDO), x333 (SPM) (82437VX only)
11 =

reserved (other)

4 - 3

 DRAM Write Burst Timing
00 = x444
01 = x333
10 = x222
11 = reserved

2

 (82439TX) reserved

2

 RAS-to-CAS Delay
0 = three clocks
1 = two clocks

1 - 0

 DRAM Leadoff Timing
82437FX/MX Read Leadoff Write Leadoff RAS# Precharge
00 8 6 3
01 7 5 3
10 8 6 4
11 7 5 4
82437VX, 82439TX Read Leadoff Write Leadoff RAS# Precharge
00 11 7 3
01 10 6 3
10 11 7 4
11 10 6 4
82439HX Read Leadoff Write Leadoff RAS# Precharge
00 7 6 3
01 6 5 3
10 7 6 4
11 6 5 4

See Also:

 #01099,#01108,#01116,#01106,#01107