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Bitfields for AMD-645 PM General Configuration register

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Bit Description

7

enable debounce of PWRBTN# input

6

enable ACPI timer reset

5 - 4

reserved ("do not program")

3

select ACPI timer size
0 = 24 bits
1 = 32 bits

2

enable PCI Frame Activation as Resume Event im power state C2

1

clock-throttling cycle time
0 = 32 msec clock, 512 msec cycle time (default)
1 = 1 msec clock 16 msec cycle time

0

reserved ("do not program")

See Also:

#01049,#01050