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Format of AMD-645 Peripheral Bus Controller, function 3 (Power Mgmt) data

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Offset Size Description

00h

64 BYTEs

header (see #00878) (vendor ID 1106h, device ID 3040h)

20h

DWORD

base address for I/O ports

40h

BYTE

pin configuration (see #01050)

41h

BYTE

general configuration (see #01051)

42h

BYTE

SCI interrupt configuration (see #01052)

43h

BYTE

reserved

44h

WORD

primary interrupt channel
bit 0 : make IRQ0 to the primary interrupt channel
bit 1 : make IRQ1 to the primary interrupt channel
bit 2 : reserved
bit 3 : make IRQ3 to the primary interrupt channel
bit 4 : make IRQ4 to the primary interrupt channel
bit 5 : make IRQ5 to the primary interrupt channel
bit 6 : make IRQ6 to the primary interrupt channel
bit 7 : make IRQ7 to the primary interrupt channel
bit 8 : make IRQ8 to the primary interrupt channel
bit 9 : make IRQ9 to the primary interrupt channel
bit 10 : make IRQ10 to the primary interrupt channel
bit 11 : make IRQ11 to the primary interrupt channel
bit 12 : make IRQ12 to the primary interrupt channel
bit 13 : make IRQ13 to the primary interrupt channel
bit 14 : make IRQ14 to the primary interrupt channel
bit 15 : make IRQ15 to the primary interrupt channel

46h

WORD

secondary interrupt channel
bit 0 : make IRQ0 to the secondary interrupt channel
bit 1 : make IRQ1 to the secondary interrupt channel
bit 2 : reserved
bit 3 : make IRQ3 to the secondary interrupt channel
bit 4 : make IRQ4 to the secondary interrupt channel
bit 5 : make IRQ5 to the secondary interrupt channel
bit 6 : make IRQ6 to the secondary interrupt channel
bit 7 : make IRQ7 to the secondary interrupt channel
bit 8 : make IRQ8 to the secondary interrupt channel
bit 9 : make IRQ9 to the secondary interrupt channel
bit 10 : make IRQ10 to the secondary interrupt channel
bit 11 : make IRQ11 to the secondary interrupt channel
bit 12 : make IRQ12 to the secondary interrupt channel
bit 13 : make IRQ13 to the secondary interrupt channel
bit 14 : make IRQ14 to the secondary interrupt channel
bit 15 : make IRQ15 to the secondary interrupt channel

48h

8 BYTEs

unused???

50h

DWORD

GP timer control (see #01053)

54h

13 BYTEs

reserved

61h

BYTE

programming interface read value (value to be returned by configuration register 09h) (write-only)

62h

BYTE

subclass read value (value to be returned by configuration register 0Ah) (write-only)

63h

BYTE

base class read value (value to be returned by configuration register 0Bh) (write-only)

64h

156 BYTEs

reserved

See Also:

#00817,#00983,#01011,#01034,#01046,#01049