Bitfields for AMD-645 IDE Miscellaneous Control 1 register |
| Bit | Description |
|---|---|
|
7 |
reserved (0) |
|
6 |
number of wait states on Master Read Cycle IRDY# |
|
5 |
number of wait states on Master Write Cycle IRDY# |
|
4 |
enable 1/2 clock advance on FIFO output |
|
3 |
enable bus-master IDE status register read retry |
|
2 - 0 |
reserved (0) |
|
See Also: |