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Bitfields for AMD-645 Miscellaneous Control 2 register

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Bit Description

7

use INIT as CPU reset signal instead of CPURST

6

enable PCI transaction delay

5

enable ports 04D0h-04D1h (per EISA spec)

4

enable interrupt controller shadow register

3

reserved (0)

2

enable write delay transaction time-out timer

1

enable read delay transaction time-out timer

0

software PCI reset -- set to cause a PCI reset via PCIRST pin

See Also:

#01011,#01018,#01020