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Bitfields for AMD-645 ROM Decode Control register

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Bit Description

7

enable 64K ROM at FFFE00000h-FFFEFFFFh

6

enable 384K ROM at FFF80000h-FFFDFFFFh

5

enable 32K ROM at E8000h-EFFFFh

4

enable 32K ROM at E0000h-E7FFFh

3

enable 32K ROM at D8000h-D8FFFh

2

enable 32K ROM at D0000h-D7FFFh

1

enable 32K ROM at C8000h-CFFFFh

0

enable 32K ROM at C0000h-C7FFFh

See Also:

#01011