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Bitfields for AMD-640 CPU-to-PCI Flow Control 1 register

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Bit Description

7, 3

PCI burst control
00 = no bursts, every write goes to write buffer
01 = burst writes placed in write buffer, non-burst writes sent to PCI bus immediately after write buffers flushed
1x = all writes go to write buffer; bursting performed for burstable transactions

6

enable byte merge

5

reserved (1)

4

enable posted PCI I/O cycle writes

2

eanble fast back-to-back PCI writes

1

enable quick frame generation (FRAME# asserted one clock early)

0

add one wait state to IRDY#

See Also:

#00983,#01006