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Bitfields for AMD-640 DRAM Control Register 2

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Bit Description

7

enable EDO test mode
when set, EDO RAM contents will read correctly, FPM not

6

reserved (0)

5 - 3

(AMD-640) reserved (0)

5

(VT82C580VPX) SDRAM CAS# latency:
0 = latency 2
1 = latency 3

4

(VT82C580VPX) reserved (0)

3

(VT82C580VPX) enable Turbo EDO mode:
0 = x-2-2-2
1 = x-1-1-1 bursts

2

add one wait state for memory data-to-host data pop

1

reduce RAS# precharge by 1T for SDRAM

0

reduce RAS# to CAS# delay for SDRAM

Note:

Bits 1 and 0 have no effect unless SDRAM has been selected via the DRAM type register (see #00991).

See Also:

#00983,#00996,#00982