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Bitfields for AMD-640 Shadow RAM Control Register 3

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Bit Description

7 - 6

segment E000h-EFFFh shadow RAM control
00 - shadowing disabled
01 - write enabled
10 - read enabled
11 - both read and write enabled

5 - 4

segment F000h-FFFFh shadow RAM control
00 - shadowing disabled
01 - write enabled
10 - read enabled
11 - both read and write enabled

1

enable SMI redirection
if set: 30000h-3FFFFh redirected to B0000h, 40000h-4FFFFh to A0000h

0

redirect video RAM accesses (A0000h-BFFFFh) to system DRAM rather than PCI bus (used to initialize SMRAM at B0000h)

See Also:

#00983,#00992,#00993