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Format of National Semiconductor PC87410 EIDE Controller configuration

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Offset Size Description

00h

64 BYTEs

header (see #00878) (vendor ID 100Bh, device ID D001h)

10h

DWORD

I/O base address for channel 0 control ports (def: 01F0h)

14h

DWORD

I/O base address for channel 0 status port (def: 03F6h)

18h

DWORD

I/O base address for channel 1 control ports (def: 0170h)

1Ch

DWORD

I/O base address for channel 1 status port (def: 0376h)

40h

BYTE

IDE Channel 0 timing control

41h

WORD

IDE Channel 0 read-ahead counter (write-only except bit 15)

43h

BYTE

IDE Channel 0 function

44h

BYTE

IDE Channel 1 timing control

45h

WORD

IDE Channel 1 read-ahead counter (write-only except bit 15)

47h

BYTE

IDE Channel 1 function

48h

BYTE

PCI control

49h

7 BYTEs

unused

50h

176 BYTEs

??? (unused?)

See Also:

#00739,#00922