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Bitfields for PCI Power Management Capabilities Status Register

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Bit Description

15

PME status: if set, PME# is (or would be) asserted
writing a 1 to this bit clears it

14-13

(read-only) scale factor to apply to contents of Data register
00 - unknown (or unimplemented data)
01 - x0.1
10 - x0.01
11 - x0.001

12-9

(read-write) data select (see #00888)

8

(read-write) enable PME# assertion

7-5

reserved (0)

4

reserved (0) 4 (read-write) enable dynamic data reporting
when set, PME# is asserted whenever the value in the Data register changes significantly

3-2

reserved (0)

1-0

(read-write) current power state
00 = D0
01 = D1
10 = D2
11 = D3

Note:

This information is from the v0.93 draft of the specification and is subject to change.

See Also:

#00884,#00885,#00887