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LAR - Load Access Rights Byte

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Code Mnemonic Description
0F 02 / r LAR r16, r/m16 r16 r/m16 masked by FF00H
0F 02 / r LAR r32, r/m32 r32 r/m32 masked by 00FxFF00H

Description
Loads the access rights from the segment descriptor specified by the second operand (source operand) into the first operand (destination operand) and sets the ZF flag in the EFLAGS register. The source operand (which can be a register or a memory location) contains the segment selector for the segment descriptor being accessed. The destination operand is a general-purpose register.

The processor performs access checks as part of the loading process. Once loaded in the desti-nation register, software can perform additional checks on the access rights information.

When the operand size is 32 bits, the access rights for a segment descriptor include the type and DPL fields and the S, P, AVL, D/B, and G flags, all of which are located in the second double-word (bytes 4 through 7) of the segment descriptor. The doubleword is masked by 00FXFF00H before it is loaded into the destination operand. When the operand size is 16 bits, the access rights include the type and DPL fields. Here, the two lower-order bytes of the doubleword are masked by FF00H before being loaded into the destination operand.

This instruction performs the following checks before it loads the access rights in the destination register:

If the segment descriptor cannot be accessed or is an invalid type for the instruction, the ZF flag is cleared and no access rights are loaded in the destination operand.

The LAR instruction can only be executed in protected mode.

Operands Bytes Clocks
r16, r16 3 8 NP
r32, r32 3 8 NP
r16, m16 3 8 NP
r32, m32 3 8 NP

Flags
ID unaffected DF unaffected
VIP unaffected IF unaffected
VIF unaffected TF unaffected
AC unaffected SF unaffected
VM unaffected ZF sets to 1 if the access rights are loaded successfully; otherwise, it is cleared to 0
RF unaffected AF unaffected
NT unaffected PF unaffected
IOPL unaffected CF unaffected
OF unaffected